Most integrated circuits are susceptible to signal jitter. Jitter refers to the deviation in, or displacement of, some aspect of the pulses of a digital signal such as frequency, signal amplitude, or phase of a signal. In high-speed communications, jitter present in a transmitted signal can make it difficult to properly sample and decode the signal at a receiver. For instance, if significant jitter is present in the clock signal used by a transmitter to coordinate transmission of symbols, a receiver may not be able to determine the clock signal used for transmission.
Jitter tolerance is a widely used measurement technique to predict the overall performance of a receiver. Jitter tolerance determines the maximum amount of jitter that can be presented at the receiver input without causing the receiver to incorrectly interpret the incoming data. High speed protocols/standards, such as XAUI and PCI Express, specify a maximum amount of jitter that may be present and therefore must be tolerated by receivers. Such protocols/standards may specify individual tolerances for different types of jitter, such as random jitter (RJ), sinusoidal jitter (SJ) or periodic jitter (PJ), duty-cycle distortion (DCD), inter-symbol interference (ISI), and/or bounded uncorrelated jitter (BUJ). Some protocols may also specify different jitter tolerances for various frequency ranges (e.g., jitter tolerance mask).
Due to the multiple types of jitter that may be specified by a protocol, jitter tolerance has typically been tested using a rack having several different test devices for introducing different types of jitter for tolerance testing. The most basic jitter tolerance testing equipment injects SJ by connecting an arbitrary waveform generator (AWG) to the delay port of a data generator, and ISI jitter is injected manually by connecting different trace lengths at the output of the data generator. This approach lacks flexibility, is labor intensive and is difficult to apply to multi-channel data collection. In recent years, equipment vendors have integrated different jitter injection capability into one piece of equipment (e.g., Agilent J-BERT). This approach allows a user to inject different types of jitter at amounts specified by the user. However, one limitation of this approach is that the cost per channel is extremely high (˜$300 K/channel for 40 Gbs). In addition to the significant costs, most high speed bench equipment has an upper data rate limit and may not be capable of testing jitter tolerance for higher data rate products (e.g., 28 Gbs).